/*
 * @ : Copyright (c) 2021 Phytium Information Technology, Inc. 
 *  
 * SPDX-License-Identifier: Apache-2.0.
 * 
 * @Date: 2021-08-25 10:27:42
 * @LastEditTime: 2021-08-26 16:45:20
 * @Description:  This files is for ctrl of watchdog timer functions
 * 
 * @Modify History: 
 *  Ver   Who        Date         Changes
 * ----- ------     --------    --------------------------------------
 * 1.0   wangxiaodong 2021/8/25   init
 */
#ifndef BSP_DRIVERS_FT_WDT_HW_H
#define BSP_DRIVERS_FT_WDT_HW_H

#ifdef __cplusplus
extern "C"
{
#endif

#include "kernel.h"
#include "ft_types.h"
#include "ft_io.h"


/* SBSA Generic Watchdog register definitions */

/* refresh frame */
#define FWDT_SBSA_GWDT_WRR		0x000

/* control frame */
#define FWDT_SBSA_GWDT_WCS		0x000  /* WCS register */
#define FWDT_SBSA_GWDT_WOR		0x008
#define FWDT_SBSA_GWDT_WCVL		0x010
#define FWDT_SBSA_GWDT_WCVH		0x014

/* refresh/control frame */
#define FWDT_SBSA_GWDT_W_IIDR	0xfcc
#define FWDT_SBSA_GWDT_IDR		0xfd0

/* Watchdog Control and Status Register */
#define FWDT_SBSA_GWDT_WCS_EN	BIT(0)
#define FWDT_SBSA_GWDT_WCS_WS0	BIT(1)
#define FWDT_SBSA_GWDT_WCS_WS1	BIT(2)

#define FWDT_REFRESH_VALUE  0

#define FWDT_STOP_VALUE  0

/***************** Macros (Inline Functions) Definitions *********************/

/* WDT Register Operations */
#define FWDT_REFRESH_ADDR(pctrl) ((pctrl)->config.refresh_baseAddr)
#define FWDT_CONTROL_ADDR(pctrl) ((pctrl)->config.control_baseAddr)
/**
 * @name: WDT_READ_REG32
 * @msg:  读取WDT寄存器
 * @param {u32} addr 定时器的基地址
 * @param {u32} reg_offset   定时器的寄存器的偏移
 * @return {u32} 寄存器参数
 */
#define FWDT_READ_REG32(addr, reg_offset) FtIn32(FWDT_CONTROL_ADDR(addr) + (u32)(reg_offset))

/**
 * @name: WDT_READ_REG64
 * @msg:  读取WDT寄存器
 * @param {u32} addr 定时器的基地址
 * @param {u32} reg_offset   定时器的寄存器的偏移
 * @return {u64} 寄存器参数
 */
#define FWDT_READ_REG64(addr, reg_offset) FtIn64(FWDT_CONTROL_ADDR(addr) + (u64)(reg_offset))

/**
 * @name: WDT_WRITE_REG32
 * @msg:  写入WDT寄存器
 * @param {u32} addr 定时器的基地址
 * @param {u32} reg_offset   定时器的寄存器的偏移
 * @param {u32} reg_value    写入寄存器参数
 * @return {void}
 */
#define FWDT_WRITE_REG32(addr, reg_offset, reg_value) FtOut32(FWDT_CONTROL_ADDR(addr) + (u32)(reg_offset), (u32)(reg_value))


#define FWDT_WRITE_REFRESH_REG32(addr, reg_offset, reg_value) FtOut32(FWDT_REFRESH_ADDR(addr) + (u32)(reg_offset), (u32)(reg_value))



#define FWDT_START(pctrl, regVal)        FWDT_WRITE_REG32(pctrl, FWDT_SBSA_GWDT_WCS, (regVal))
#define FWDT_STOP(pctrl, regVal)         FWDT_WRITE_REG32(pctrl, FWDT_SBSA_GWDT_WCS, (regVal))
#define FWDT_REFRESH(pctrl, regVal)      FWDT_WRITE_REFRESH_REG32(pctrl, FWDT_SBSA_GWDT_WRR, (regVal))

#define FWDT_SET_TIMEOUT(pctrl, regVal)  FWDT_WRITE_REG32(pctrl, FWDT_SBSA_GWDT_WOR, (u32)((WDT_CLK) * (regVal)))

#define FWDT_READ_WCS(pctrl)  FWDT_READ_REG32(pctrl, FWDT_SBSA_GWDT_WCS)
#define FWDT_READ_WOR(pctrl)  FWDT_READ_REG32(pctrl, FWDT_SBSA_GWDT_WOR)
#define FWDT_READ_WCV(pctrl)  FWDT_READ_REG64(pctrl, FWDT_SBSA_GWDT_WCVL)



#ifdef __cplusplus
}
#endif

#endif